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  <doi_batch_id>aspg-3-2627-1791419947</doi_batch_id>
  <timestamp>20261008003907</timestamp>
  <depositor>
   <depositor_name>American Scientific Publishing Group</depositor_name>
   <email_address>admin@americaspg.com</email_address>
  </depositor>
  <registrant>American Scientific Publishing Group</registrant>
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 <body>
  <journal>
   <journal_metadata language="en">
    <full_title>Fusion: Practice and Applications</full_title>
    <abbrev_title>FPA</abbrev_title>
    <issn media_type="print">2770-0070</issn>
    <issn media_type="electronic">2692-4048</issn>
   </journal_metadata>
   <journal_issue>
    <publication_date media_type="online">
     <year>2024</year>
    </publication_date>
    <journal_volume>
     <volume>15</volume>
    </journal_volume>
    <issue>2</issue>
   </journal_issue>
   <journal_article publication_type="full_text">
    <titles>
     <title>Predicting Loop Vectorization through Machine Learning Algorithms</title>
    </titles>
    <contributors>
     <person_name sequence="first" contributor_role="author">
      <given_name>Esraa H.</given_name>
      <surname>Alwan</surname>
      <affiliations>
       <institution>
        <institution_name>Department of Computer Science, Collage of science for women University of Babylon, Iraq</institution_name>
       </institution>
      </affiliations>
     </person_name>
    </contributors>
    <jats:abstract>
     <jats:p>Automatic vectorization is often utilized to improve the speed of compute-intensive programs on current CPUs. However, there is enormous space for improvement in present compiler auto-vectorization capabilities. Execution with optimizing code on these resource-controlled strategies is essential for both energy and performance efficiency. While vectorization suggests major performance developments, conventional compiler auto-vectorization techniques often fail. This study investigated the prospective of machine learning algorithms to enhance vectorization. The study proposes an ensemble learning method by employing Random Forest (RF), Feedforward Neural Network (FNN), and Support Vector Machine (SVM) algorithms to estimate the effectiveness of vectorization over Trimaran Single-Value Code (TSVC) loops. Unlike existing methods that depend on static program features, we leverage dynamic features removed from hardware counter-events to build efficient and robust machine learning models. Our approach aims to improve the performance of e-business microcontroller platforms while identifying profitable vectorization opportunities. We assess our method using a benchmark group of 155 loops with two commonly used compilers (GCC and Clang). The results demonstrated high accuracy in predicting vectorization benefits in e-business applications.</jats:p>
    </jats:abstract>
    <publication_date media_type="online">
     <year>2024</year>
    </publication_date>
    <pages>
     <first_page>36</first_page>
     <last_page>45</last_page>
    </pages>
    <publisher_item>
     <item_number item_number_type="article-number">2627</item_number>
    </publisher_item>
    <ai:program name="AccessIndicators">
     <ai:license_ref applies_to="vor">https://creativecommons.org/licenses/by/4.0/</ai:license_ref>
    </ai:program>
    <doi_data>
     <doi>10.54216/FPA.150203</doi>
     <resource>https://www.americaspg.com/journal/3/article/2627</resource>
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       <resource mime_type="application/pdf">https://www.americaspg.com/storage/81711919433.pdf</resource>
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