International Journal of Wireless and Ad Hoc Communication

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Volume 9 , Issue 2 , PP: 41-55, 2025 | Cite this article as | XML | Html | PDF | Full Length Article

A Novel approach for Minimizing the Process Voltage Temperature Variation (PVT) Detector for Digital Converter Design

R. Shanmuga Sundaram 1 * , R. Mohanraj 2 * , S. Sasidevi 3

  • 1 Assistant Professor Department of ECE, Knowledge Institute of Technology, Salem, Tamil Nadu, India - (rsece@kiot.ac.in)
  • 2 PG Scholar, Department of ECE, Knowledge Institute of Technology, Salem, Tamil Nadu, India - (mohanraj487@gmail.com)
  • 3 Assistant Professor Department of ECE, Knowledge Institute of Technology, Salem, Tamil Nadu, India - (ssdece@kiot.ac.in)
  • Doi: https://doi.org/10.54216/IJWAC.090205

    Received: February 05, 2025 Revised: March 01, 2025 Accepted: April 02, 2025
    Abstract

    Time-to-digital converters (TDCs) are vital components in digital circuitry, crucial for synchronization and precise measurement, demanding high resolution and accuracy. This brief introduces a novel TDC designed in order to reduce the impact of fluctuations in process, voltage, and temperature. A process voltage temperature detector using an extra delay line that is optimized for locking situations is incorporated into the suggested TDC to distinguish PVT corners effectively. Implemented in a 90-nm process, on-silicon measurements reveal impressive performance achieving 30-ps resolution.

    Keywords :

    D-flip-flip (DFF) , Process voltage and temperature (PVT) , PVT corner detector , Time-to-digital converter (TDC)

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    Cite This Article As :
    Shanmuga, R.. , Mohanraj, R.. , Sasidevi, S.. A Novel approach for Minimizing the Process Voltage Temperature Variation (PVT) Detector for Digital Converter Design. International Journal of Wireless and Ad Hoc Communication, vol. , no. , 2025, pp. 41-55. DOI: https://doi.org/10.54216/IJWAC.090205
    Shanmuga, R. Mohanraj, R. Sasidevi, S. (2025). A Novel approach for Minimizing the Process Voltage Temperature Variation (PVT) Detector for Digital Converter Design. International Journal of Wireless and Ad Hoc Communication, (), 41-55. DOI: https://doi.org/10.54216/IJWAC.090205
    Shanmuga, R.. Mohanraj, R.. Sasidevi, S.. A Novel approach for Minimizing the Process Voltage Temperature Variation (PVT) Detector for Digital Converter Design. International Journal of Wireless and Ad Hoc Communication , no. (2025): 41-55. DOI: https://doi.org/10.54216/IJWAC.090205
    Shanmuga, R. , Mohanraj, R. , Sasidevi, S. (2025) . A Novel approach for Minimizing the Process Voltage Temperature Variation (PVT) Detector for Digital Converter Design. International Journal of Wireless and Ad Hoc Communication , () , 41-55 . DOI: https://doi.org/10.54216/IJWAC.090205
    Shanmuga R. , Mohanraj R. , Sasidevi S. [2025]. A Novel approach for Minimizing the Process Voltage Temperature Variation (PVT) Detector for Digital Converter Design. International Journal of Wireless and Ad Hoc Communication. (): 41-55. DOI: https://doi.org/10.54216/IJWAC.090205
    Shanmuga, R. Mohanraj, R. Sasidevi, S. "A Novel approach for Minimizing the Process Voltage Temperature Variation (PVT) Detector for Digital Converter Design," International Journal of Wireless and Ad Hoc Communication, vol. , no. , pp. 41-55, 2025. DOI: https://doi.org/10.54216/IJWAC.090205